Novel Superjunction LDMOS (>950 V) With a Thin Layer SOI
- 12 September 2017
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 38 (11), 1555-1558
- https://doi.org/10.1109/led.2017.2751571
Abstract
A novel superjunction (SJ) LDMOS (>950 V) with a thin layer SOI (T-SJ LDMOS) combining the advantage of low specific on-resistance Ron,sp of the SJ and the high breakdown voltage VB of the thin SOI is proposed and experimentally demonstrated in this letter. Based on our previously developed equivalent substrate (ES) model, the optimized SJ endows the device with a respectably reduced Ron,sp without sacrificing VB. Meanwhile, the thin layer SOI is designed with the enhanced dielectric layer field (ENDIF) principle to carry out a high VB. The experimental results exhibit a Ron,sp of 145 mΩ·cm² with a VB of 977 V. This represents a reduction in Ron,sp by 18.1% when compared with the theoretical Ron,spα 2.5 “silicon limit”.Keywords
Funding Information
- National Natural Science Foundation of China (61704020, 61376080, 61474017)
- 13th Five-year Plan for Microelectronics Advanced Research Program (31513030201-2)
- Fundamental Research Funds for the Central Universities (ZYGX2017KYQD159)
This publication has 15 references indexed in Scilit:
- The $R_{\mathrm{\scriptscriptstyle ON},\mathrm {min}}$ of Balanced Symmetric Vertical Super Junction Based on R-Well ModelIEEE Transactions on Electron Devices, 2016
- Optimization and New Structure of Superjunction With Isolator LayerIEEE Transactions on Electron Devices, 2016
- Optimization of Lateral Superjunction Based on the Minimum Specific ON-ResistanceIEEE Transactions on Electron Devices, 2016
- Theory of Superjunction With NFD and FD Modes Based on Normalized Breakdown VoltageIEEE Transactions on Electron Devices, 2015
- Equivalent Substrate Model for Lateral Super Junction DeviceIEEE Transactions on Electron Devices, 2014
- A Novel Vertical Field Plate Lateral Device With Ultralow Specific On-ResistanceIEEE Transactions on Electron Devices, 2013
- Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on InsulatorIEEE Transactions on Electron Devices, 2009
- Analysis of silicon carbide power device performancePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A dielectric isolated high-voltage IC-technology for off-line applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Numerical modeling of linear doping profiles for high-voltage thin-film SOI devicesIEEE Transactions on Electron Devices, 1999