Quantification of Drain Extension Leakage in a Scaled Bulk Germanium PMOS Technology
- 30 October 2009
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 56 (12), 3115-3122
- https://doi.org/10.1109/ted.2009.2033156
Abstract
This paper is the first to quantify drain extension leakage in a sub-100-nm gate-length bulk germanium technology. Leakage through the transistor's extension/halo junction is shown to be the dominant leakage component in a scaled transistor layout. Optimizing halo and extension implants to improve short-channel control further increases the extension leakage. As a consequence, drain-to-bulk leakage in Ge pFETs is likely 4 times 10-7 A/mum or higher for an LG = 70-nm pMOS technology with good short-channel control at a supply voltage of 1 V. The weak thermal sensitivity of the extension leakage points to a band-to-band tunneling (BTBT) mechanism, which leads to only 40%-50% increase of the extension leakage between 25degC and 100degC. As BTBT depends exponentially on the electric field across the junction, lowering the supply voltage below 0.7 V can lead to drain leakages below 1 times 10-7 A/mum.Keywords
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