Total Dose Effects in CMOS Trench Isolation Regions

Abstract
A model for inversion in trench isolation is developed using an analytical model to calculate the surface charge density along the trench sidewall. The model shows that the inversion path takes place well below the trench corner for devices with 180 nm feature size. The increased hardness of highly scaled devices is caused by a combination of higher doping levels and a decrease in the lateral charge collection path within the trench.