Low On-Resistance Normally-Off GaN Double-Channel Metal–Oxide–Semiconductor High-Electron-Mobility Transistor
- 9 October 2015
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 36 (12), 1287-1290
- https://doi.org/10.1109/led.2015.2489228
Abstract
A low on-resistance normally-off GaN double-channel metal-oxide-semiconductor high-electronmobility transistor (DC-MOS-HEMT) is proposed and demonstrated in this letter, which features a 1.5-nm AlN insertion layer (ISL) located 6 nm below the conventional barrier/GaN interface, forming a second channel at the interface between the AlN-ISL and the underlying GaN. With gate recess terminated at the upper channel, normally-off operation was obtained with Vth of +0.5 V at I DS = 10 μA/mm or +1.4 V from the linear extrapolation of the transfer curve. The lower heterojunction channel is separated from the etched surface in the gate region, thereby maintaining its high field-effect mobility with a peak value of 1801 cm 2 /(V·s). The on-resistance is as small as 6.9 Q·mm for a DC-MOS-HEMT with LG/LGS/ L GD = 1.5/2/15 μm, and the maximum drain current is 836 mA/mm. A high breakdown voltage (>700 V) and a steep subthreshold swing of 72 mV/decade are also obtained. Index Terms-Double-channel MOS-HEMT (DC-MOSHEMT), field-effect mobility, gate recess, normally-off.Keywords
Funding Information
- Innovation and Technology Commission (ITS/192/14FP)
- Research Grants Council, University Grants Committee, Hong Kong (N_HKUST636/13)
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