Thin film transistors fabricated by in situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

Abstract

High-mobility low-temperature (≤600 °C) unhydrogenated in situ doped polysilicon thin film transistors (TFTs) are made. Polysilicon layers are grown by a low pressure chemical vapour deposition (LPCVD) technique and crystallized in a vacuum by thermal annealing. The source and drain regions are in situ doped. The gate insulator is made of an atmospheric pressure chemical vapour deposition (APCVD) silicon dioxide. Hydrogen passivation is not performed on the transistors. One type of transistor is made of two polysilicon layers, the other one is fabricated from a single polysilicon layer. The electrical properties are better for transistors made of a single polysilicon layer: a low threshold voltage (1.2 V), a subthreshold slope S = 0.7 V/dec, a high field effect mobility (≈100 cm² V^-1 s^-1) and an on/off-state current ratio higher than 10⁷ for a drain voltage V_ds = 1 V. At low drain voltage, for both transistors, the off-state current results from a pure thermal emission of trapped carriers. However, at high drain voltage, the electrical behaviour is different: in the case of single polysilicon TFTs, the current obeys the field-assisted (Poole-Frenkel) thermal emission model of trapped carriers while for TFTs made of two polysilicon layers, the higher off-state current results from a field-enhanced thermal emission.