Low power CMOS pass logic 4-2 compressor for high-speed multiplication
- 11 November 2002
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)
- Vol. 3, 1296-1298 vol.3
- https://doi.org/10.1109/mwscas.2000.951453
Abstract
A novel CMOS 4-2 compressor using pass logic is presented in this paper. An XOR-XNOR combination gate is used to build the circuit while totally eliminating the use of inverters. The total power dissipation has been cut down to a minimum while providing the full output voltage swing at all nodes in the circuit. Furthermore, the complete circuit is implemented with a bare minimum of 28 transistors.Keywords
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