A Novel Bit-Flipping LDPC Decoder for Solid-State Data Storage
- 6 February 2014
- journal article
- Published by Trans Tech Publications, Ltd. in Applied Mechanics and Materials
- Vol. 513-517, 2094-2098
- https://doi.org/10.4028/www.scientific.net/amm.513-517.2094
Abstract
This paper concerns the design of high-speed and low-cost LDPC code bit-flipping decoder. Due to its inferior error correction strength, bit-flipping decoding received very little attention compared with message-passing decoding. Nevertheless, emerging flash-based solid-state data storage systems inherently favor a hybrid bit-flipping/message-passing decoding strategy, due to the significant dynamics and variation of NAND flash memory raw storage reliability. Therefore, for the first time highly efficient silicon implementation of bit-flipping decoder becomes a practically relevant topic. To address the drawbacks caused by the global search operation in conventional bit-flipping decoding, this paper presents a novel bit-flipping decoder design. Decoding simulations and ASIC design show that the proposed design solution can achieve upto 80% higher decoding throughput and meanwhile consume upto 50% less silicon cost, while maintaining almost the same decoding error correction strength.This publication has 8 references indexed in Scilit:
- Robust decoder architecture for multi-level flash memory storage channelsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2012
- A 640-Mb/s 2048-Bit Programmable LDPC Decoder ChipIEEE Journal of Solid-State Circuits, 2006
- Block-LDPC: a practical LDPC coding system design approachIEEE Transactions on Circuits and Systems I: Regular Papers, 2005
- A Reduced Complexity Decoder Architecture via Layered Decoding of LDPC CodesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- Memory-efficient turbo decoder architectures for LDPC codesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Introduction to flash memoryProceedings of the IEEE, 2003
- Low-density parity-check codes based on finite geometries: a rediscovery and new resultsIEEE Transactions on Information Theory, 2001
- Good error-correcting codes based on very sparse matricesIEEE Transactions on Information Theory, 1999