Fabrication and Characterization of Gate-All-Around Silicon Nanowires on Bulk Silicon
- 31 October 2008
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nanotechnology
- Vol. 7 (6), 733-744
- https://doi.org/10.1109/tnano.2008.2007215
Abstract
This paper reports on the top-down fabrication and electrical performance of silicon nanowire (SiNW) gate-all-around (GAA) n-type and p-type MOSFET devices integrated on bulk silicon using a local-silicon-on-insulator (SOI) process. The proposed local-SOI fabrication provides various nanowire cross sections: Omega-like, pentagonal, triangular, and circular, all controlled by isotropic etching using nitride spacers and silicon sacrificial oxidation. The reported top-down SiNW fabrication offers excellent control of wire doping and placement, as well as ohmic source and drain contacts. A particular feature of the process is the buildup of a tensile strain in all suspended nanowires, attaining values of few percents, reflected in stress values higher than 2-3 GPa. A very high yield (>90%) is obtained in terms of functionality of long-channel SiNW GAA mosfet. Device characteristics are reported from cryogenic temperature (T = 5 K) up to 150 degC, and promising characteristics in terms of low-field electron mobility, threshold voltage control, and subthreshold slope are demonstrated. Low field mobility for electrons up to 850 cm2 /Vmiddots is reported at room temperature in suspended devices with triangular cross sections; this mobility enhancement is explained by the process-induced tensile strain. In short, suspended SiNW GAA with small triangular cross sections, a single-electron transistor (SET) operation regime is highlighted at T = 5 K. This is attributed to a combined effect of strain and corner conduction in triangular channel cross sections, suggesting the possibility to hybridize CMOS and SET functions by a unique nanowire fabrication platform.Keywords
This publication has 27 references indexed in Scilit:
- Cointegration of Gate-All-Around MOSFETs and Local Silicon-on-Insulator Optical Waveguides on Bulk SiliconIEEE Transactions on Nanotechnology, 2007
- Giant piezoresistance effect in silicon nanowiresNature Nanotechnology, 2006
- Transport Effects on Signal Propagation in Quantum WiresIEEE Transactions on Electron Devices, 2005
- Two-dimensional simulation of pattern-dependent oxidation of silicon nanostructures on silicon-on-insulator substratesSolid-State Electronics, 2004
- Silicon single-electron devices and their applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- Fabrication of Si single-electron transistors with precise dimensions by electron-beam nanolithographyJournal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 2002
- Formulation of a Viscoelastic Stress Problem Using Analytical Integration and Its Application to Viscoelastic Oxidation SimulationJapanese Journal of Applied Physics, 2001
- Single-electron devices and their applicationsProceedings of the IEEE, 1999
- Modeling of stress effects in silicon oxidationIEEE Transactions on Electron Devices, 1989
- Surface mobility in n/sup +/ and p/sup +/ doped polysilicon gate PMOS transistorsIEEE Transactions on Electron Devices, 1989