Fault-Tolerant and Fail-Safe Design Based on Reconfiguration
- 25 May 2011
- book chapter
- other
- Published by IGI Global
Abstract
The main aim of this chapter is to present the way, how to design fault-tolerant or fail-safe systems in programmable hardware (FPGAs) and therefore to use FPGAs in mission-critical applications, too. RAM based FPGAs are usually taken for unreliable due to high probability of transient faults (SEU) and therefore inapplicable in this area. But FPGAs can be easily reconfigured. The authors’ aim is to utilize appropriate type of FPGA reconfiguration and to combine it with well-known methods for fail-safe and fault-tolerant design (duplex, TMR) including on-line testing methods for fault detection and then startup of the reconfiguration process. Dependability parameters’ calculations based on reliability models is integral part of proposed methodology. The trade-off between the requested level of dependability characteristics of a designed system and area overhead with respect to FPGA possible faults the main property and advantage of proposed methodology.Keywords
This publication has 34 references indexed in Scilit:
- Dependable design technique for system-on-chipJournal of Systems Architecture, 2008
- Designing fault-tolerant techniques for SRAM-based FPGAsIEEE Design & Test of Computers, 2004
- Common-mode failures in redundant VLSI systems: a surveyIEEE Transactions on Reliability, 2000
- Self-checking Synchronous FSM Network Design with Low OverheadVLSI Design, 2000
- Self-Testing Embedded Two-Rail CheckersPublished by Springer Science and Business Media LLC ,1998
- Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel CountersPublished by Springer Science and Business Media LLC ,1998
- Concurrent Delay Testing in Totally Self-Checking SystemsPublished by Springer Science and Business Media LLC ,1998
- Logic synthesis of multilevel circuits with concurrent error detectionIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1997
- Single event upset at ground levelIEEE Transactions on Nuclear Science, 1996
- Self-checking design in Eastern EuropeIEEE Design & Test of Computers, 1996