Built-in self-test (BIST) design of large-scale analog circuit networks
- 13 January 2003
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- Fault prediction process for large analogue circuit networksInternational Journal of Circuit Theory and Applications, 1989
- On the implementation of an analog ATPG: the nonlinear caseIEEE Transactions on Instrumentation and Measurement, 1988
- On the Implementation of an Analog ATPG: The Linear CaseIEEE Transactions on Instrumentation and Measurement, 1985
- Diagnosability in the decomposition approach for fault location in large analog networksIEEE Transactions on Circuits and Systems, 1985
- Built-In Self-Test TechniquesIEEE Design & Test of Computers, 1985
- Fault diagnosis of analog circuitsProceedings of the IEEE, 1985
- A unified decomposition approach for fault location in large analog circuitsIEEE Transactions on Circuits and Systems, 1984
- Node-fault diagnosis and a design of testabilityIEEE Transactions on Circuits and Systems, 1983
- Analog multifrequency fault diagnosisIEEE Transactions on Circuits and Systems, 1983
- Multiple-fault location of analog circuitsIEEE Transactions on Circuits and Systems, 1981