Built-In Self-Test Techniques
- 1 April 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Design & Test of Computers
- Vol. 2 (2), 21-28
- https://doi.org/10.1109/mdt.1985.294856
Abstract
A system that includes self-test features must have facilities for generating test patterns and analyzing the resultant circuit response. This article surveys the structures that are used to implement these self-test functions. The various techniques used to convert the system bistables into test scan paths are discussed. The addition of bistables associated with the I/O bonding pads so that the pads can be accessed via a scan path (external or boundary scan path) is described. Most designs use linear-feedback shift registers for both test pattern generation and response analysis. The various linear-feedback shift register designs for pseudorandom or pseudoexhaustive input test pattern generation and for output response signature analysis are presented.Keywords
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