Gate semi-around Si nanowire FET fabricated by conventional CMOS process with very high drivability
- 1 September 2010
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2010 Proceedings of the European Solid State Device Research Conference
Abstract
Gate semi-around silicon nanowire (SiNW) FETs have been fabricated and their electrical characteristics, especially on the drivability, have been assessed for future high performance devices. Among different wire size, a SiNW FET with a cross-section of 12 × 19 nm2 has shown an improvement in the on-current (ION) when normalized by the channel peripheral length. A high ION over 1600 μA/μm at an overdrive voltage of 1 V has been achieved with a gate length and an oxide thickness of 65 and 3 nm, respectively. The origin of the high drivability has been speculated by higher carrier density, improved carrier mobility and the reduction in the series resistance.Keywords
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