Nanowire gate-all-around MOSFETs modeling: ballistic transport incorporating the source-to-drain tunneling

Abstract

Incorporating the source-to-drain tunneling current that is valid in all operating regions, an analytical compact model is proposed in this paper for cylindrical ballistic gate-all-around n-type metal-oxide-semiconductor field-effect transistors with ultra-short silicon channel. From taking the drain-induced barrier lowering effect into consideration, the potential distribution within the device channel has been modeled based upon a 2D analysis in our previous work. In this study, by introducing a parabolic function when modeling the potential profile in the channel direction, we found out that the source-to-drain tunneling effect in the subthreshold region could be evaluated analytically by applying Wentzel-Kramers-Brillouin approximation. Then, it is practical to estimate the ballistic drain current for all operating regions analytically with this compact model considering both the source-to-drain tunneling and thermionic transport. The resulting analytic compact model is tested against non-equilibrium Green's function simulation using SILVACO, and good accuracy is demonstrated. Finally, we perform an NMOS inverter circuit simulation using HSPICE, when introducing our model to it as a Verilog-A script.