Hybrid transactional memory

Abstract

High performance parallel programs are currently difficult to write and debug. One major source of difficulty is protecting concu rrent accesses to shared data with an appropriate synchronization mech- anism. Locks are the most common mechanism but they have a number of disadvantages, including possibly unnecessary serializa- tion, and possible deadlock. Transactional memory is an alternative mechanism that makes parallel programming easier. With transac- tional memory, a transaction provides atomic and serializable oper- ations on an arbitrary set of memory locations. When a transaction commits, all operations within the transaction become visible to other threads. When it aborts, all operations in the transac tion are rolled back. Transactional memory can be implemented in either hardware or software. A straightforward hardware approach can have high performance, but imposes strict limits on the amount of data up- dated in each transaction. A software approach removes these lim- its, but incurs high overhead. We propose a novel hybrid hardware- software transactional memory scheme that approaches the perfor- mance of a hardware scheme when resources are not exhausted and gracefully falls back to a software scheme otherwise. Categories and Subject Descriptors D.1.3 (Programming Tech- niques): Concurrent Programming - Parallel programming