CMOS sensors for on-line thermal monitoring of VLSI circuits
- 1 September 1997
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 5 (3), 270-276
- https://doi.org/10.1109/92.609869
Abstract
The paper presents appropriate sensors for the realization of the design principle of design for thermal testability (DfTT). After a short overview of the available CMOS temperature sensors, a new family of temperature sensors will be presented, developed by the authors especially for the purpose of thermal monitoring of VLSI chips. These sensors are characterized by the very low silicon area of about 0.003-0.02 mm/sup 2/ and the low power consumption (200 /spl mu/W). The accuracy is in the order of 1/spl deg/C. Using the frequency-output versions an easy interfacing of digital test circuitry is assured. They can be very easily incorporated into the usual test circuitry, via the boundary-scan architecture. The paper presents measured results obtained by the experimental circuits. The facilities provided by the sensor connected to the boundary-scan test circuitry are also demonstrated experimentally.Keywords
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