The negative bias temperature instability in MOS devices: A review
Top Cited Papers
- 23 September 2005
- journal article
- review article
- Published by Elsevier BV in Microelectronics Reliability
- Vol. 46 (2-4), 270-286
- https://doi.org/10.1016/j.microrel.2005.08.001
Abstract
No abstract availableKeywords
This publication has 95 references indexed in Scilit:
- Statistical mechanics based model for negative bias temperature instability induced degradationJournal of Applied Physics, 2005
- Impact of Hf content on negative bias temperature instabilities in HfSiON-based gate stacksApplied Physics Letters, 2005
- Reaction-dispersive proton transport model for negative bias temperature instabilitiesApplied Physics Letters, 2005
- Interface Trap Generation and Hole Trapping Under NBTI and PBTI in Advanced CMOS Technology With a 2-nm Gate OxideIEEE Transactions on Device and Materials Reliability, 2004
- The characteristics of hole trapping in HfO2∕SiO2 gate dielectrics with TiN gate electrodeApplied Physics Letters, 2004
- Linear relationship between H+-trapping reaction energy and defect generation: Insight into nitrogen-enhanced negative bias temperature instabilityApplied Physics Letters, 2003
- Generalized diffusion-reaction model for the low-field charge-buildup instability at the Si-interfacePhysical Review B, 1995
- A new model for the negative voltage instability in MOS devicesApplied Physics Letters, 1975
- On the Formation of Surface States during Stress Aging of Thermal Si-SiO[sub 2] InterfacesJournal of the Electrochemical Society, 1973
- Stabilization of MOS devicesSolid-State Electronics, 1967