A 0.5-V Capless LDO With 30-dB PSRR at 10-kHz Using a Lightweight Local Generated Supply
- 1 October 2020
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems II: Express Briefs
- Vol. 67 (10), 1785-1789
- https://doi.org/10.1109/TCSII.2019.2954700
Abstract
An analog low dropout regulator (LDO) that can operate at ultra-low voltage (ULV) with high power supply rejection ratio (PSRR) is presented in this brief. The supplies of the error amplifier and the power stage in this LDO are separated, and a lightweight local generated supply (LLGS) is proposed to guarantee the proper function of the associated error amplifier in ULV mode. This LLGS assisted analog LDO has been experimentally verified in 0.13 mu m CMOS technology and it only occupies an active area of 0.035 mm(2). Measurement results indicate that this LDO can achieve greater than 30 dB PSRR up to 10 kHz at supply voltage as low as 0.5 V.Keywords
Funding Information
- National Natural Science Foundation of China (61904061)
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