Secure Logic Synthesis
- 1 January 2004
- book chapter
- conference paper
- Published by Springer Science and Business Media LLC in Lecture Notes in Computer Science
- p. 1052-1056
- https://doi.org/10.1007/978-3-540-30117-2_125
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- A logic level design methodology for a secure DPA resistant ASIC or FPGA implementationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- How Secure Are FPGAs in Cryptographic Applications?Lecture Notes in Computer Science, 2003
- Power-Analysis Attacks on an FPGA – First Experimental ResultsLecture Notes in Computer Science, 2003
- Dynamic power consumption in Virtex™-II FPGA familyPublished by Association for Computing Machinery (ACM) ,2002