Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions
- 17 January 2017
- journal article
- Published by American Chemical Society (ACS) in ACS Nano
- Vol. 11 (2), 1704-1711
- https://doi.org/10.1021/acsnano.6b07531
Abstract
Germanium is a promising material for future very large scale integration transistors, due to its superior hole mobility. However, germanium-based devices typically suffer from high reverse junction leakage due to the low band-gap energy of 0.66 eV and therefore are characterized by high static power dissipation. In this paper, we experimentally demonstrate a solution to suppress the off-state leakage in germanium nanowire Schottky barrier transistors. Thereto, a device layout with two independent gates is used to induce an additional energy barrier to the channel that blocks the undesired carrier type. In addition, the polarity of the same doping-free device can be dynamically switched between p- and n-type. The shown germanium nanowire approach is able to outperform previous polarity-controllable device concepts on other material systems in terms of threshold voltages and normalized on-currents. The dielectric and Schottky barrier interface properties of the device are analyzed in detail. Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systemsKeywords
Funding Information
- Bundesministerium f?r Bildung und Forschung
- Deutsche Forschungsgemeinschaft (MI1247/6-2, WE4853/1-2)
- Center for Advancing Electronics Dresden, Technische Universit?t Dresden
This publication has 38 references indexed in Scilit:
- Germanium-based transistors for future high performance and low power logic applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2015
- First demonstration of Ge nanowire CMOS circuits: Lowest SS of 64 mV/dec, highest gmax of 1057 μS/μm in Ge nFETs and highest maximum voltage gain of 54 V/V in Ge CMOS invertersPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2015
- Germanium Based Field-Effect Transistors: Challenges and OpportunitiesMaterials, 2014
- Enhanced Device Performance of Germanium Nanowire Junctionless (GeNW-JL) MOSFETs by Germanide Contact Formation with Ar Plasma TreatmentACS Applied Materials & Interfaces, 2014
- Understanding the Impact of Schottky Barriers on the Performance of Narrow Bandgap Nanowire Field Effect TransistorsNano Letters, 2012
- Ferromagnetic Germanide in Ge Nanowire Transistors for Spintronics ApplicationACS Nano, 2012
- Advancing CMOS beyond the Si roadmap with Ge and III/V devicesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2011
- Reconfigurable Silicon Nanowire TransistorsNano Letters, 2011
- Improved Subthreshold Slope in an InAs Nanowire Heterostructure Field-Effect TransistorNano Letters, 2006
- Ge/Si nanowire heterostructures as high-performance field-effect transistorsNature, 2006