Functionality-Enhanced Logic Gate Design Enabled by Symmetrical Reconfigurable Silicon Nanowire Transistors
Top Cited Papers
- 8 May 2015
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nanotechnology
- Vol. 14 (4), 689-698
- https://doi.org/10.1109/tnano.2015.2429893
Abstract
Reconfigurable silicon nanowire field-effect transistors (RFETs) combine the functionality of classical unipolar p-type and n-type FETs in one universal device. In this paper, we show devices exhibiting full symmetry between pand n-functionality, while having identical geometry. Scaling trends and feasibility for digital circuit integration are evaluated based on TCAD simulations. The method of logical effort is applied to analyze fundamental differences in circuit topology using this unique type of multigate transistors. We introduce a set of multifunctional logic gates based on RFETs providing all basic Boolean functions, including NAND/NOR, AND/OR, and XOR/XNOR, and compared them with classical implementations. Two 1-bit full adders based on those gates are presented as an insightful example that RFETs are one possible solution to increase the system functionality. Moreover, it is shown that an asymmetric transistor layout with individual optimization of both top gates can be used to increase the speed of those circuits.Keywords
Funding Information
- Deutsche Forschungsgemeinschaft (DFG) (1247/6-2, WE4853/1-2)
- Cluster of Excellence ´CfAED
This publication has 21 references indexed in Scilit:
- Reconfigurable Nanowire Electronics-Enabling a Single CMOS Circuit TechnologyIEEE Transactions on Nanotechnology, 2014
- Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETsIEEE Transactions on Circuits and Systems I: Regular Papers, 2014
- Nanowire systems: technology and designPhilosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, 2014
- Material Prospects of Reconfigurable Transistor (RFETs) – From Silicon to Germanium NanowiresMRS Proceedings, 2014
- Ultrashort Channel Silicon Nanowire Transistors with Nickel Silicide Source/Drain ContactsNano Letters, 2012
- Reconfigurable Silicon Nanowire TransistorsNano Letters, 2011
- Direct Probing of Schottky Barriers in Si Nanowire Schottky Barrier Field Effect TransistorsPhysical Review Letters, 2011
- High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devicesIEEE Electron Device Letters, 2006
- High-Performance Carbon Nanotube Field-Effect Transistor With Tunable PolaritiesIEEE Transactions on Nanotechnology, 2005
- A new recombination model for device simulation including tunnelingIEEE Transactions on Electron Devices, 1992