A novel CNTFET-based ternary logic gate design
- 1 August 2009
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper presents a novel design of ternary logic inverters using carbon nanotube FETs (CNTFETs). Multiple-valued logic (MVL) circuits have attracted substantial interest due to the capability of increasing information content per unit area. In the past extensive design techniques for MVL circuits (especially ternary logic inverters) have been proposed for implementation in CMOS technology. In CNTFET device, the threshold voltage of the transistor can be controlled by controlling the chirality vector (i.e. the diameter); in this paper this feature is exploited to design ternary logic inverters. New designs are proposed and compared with existing CNTFET-based designs. Extensive simulation results using SPICE demonstrate that power delay product is improved by 300% comparing to the conventional ternary gate design.Keywords
This publication has 11 references indexed in Scilit:
- Device Model for Ballistic CNFETs Using the First Conducting BandIEEE Design & Test of Computers, 2008
- Carbon Nanotubes for High-Performance Electronics—Progress and ProspectProceedings of the IEEE, 2008
- A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application—Part I: Model of the Intrinsic Channel RegionIEEE Transactions on Electron Devices, 2007
- A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application—Part II: Full Device Model and Circuit Performance BenchmarkingIEEE Transactions on Electron Devices, 2007
- Carbon-Nanotube-Based Voltage-Mode Multiple-Valued Logic DesignIEEE Transactions on Nanotechnology, 2005
- Chirality assignment of individual single-walled carbon nanotubes in carbon nanotube field-effect transistors by micro-photocurrent spectroscopyApplied Physics Letters, 2004
- Theory of ballistic nanotransistorsIEEE Transactions on Electron Devices, 2003
- Growth of Single-Walled Carbon Nanotubes from Discrete Catalytic Nanoparticles of Various SizesThe Journal of Physical Chemistry B, 2001
- A Survey of Multivalued MemoriesIEEE Transactions on Computers, 1986
- Depletion/enhancement CMOS for a lower power family of three-valued logic circuitsIEEE Journal of Solid-State Circuits, 1985