Experimental gate misalignment analysis on double gate SOI MOSFETs
- 7 March 2005
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- A self-aligned, electrically separable double-gate MOS transistor technology for dynamic threshold voltage applicationIEEE Transactions on Electron Devices, 2003
- Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performanceIEEE Electron Device Letters, 1987