A High-Rate Energy-Resolving Photon-Counting ASIC for Spectral Computed Tomography
- 25 October 2011
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 59 (1), 30-39
- https://doi.org/10.1109/tns.2011.2169811
Abstract
We describe a high-rate energy-resolving photon-counting ASIC aimed for spectral computed tomography. The chip has 160 channels and 8 energy bins per channel. It demonstrates a noise level of ENC =214 electrons at 5 pF input load at a power consumption of <; 5 mW/channel. Maximum count rate is 17 Mcps at a peak time of 40 ns, made possible through a new filter reset scheme, and maximum read-out frame rate is 37 kframe/s.Keywords
This publication has 23 references indexed in Scilit:
- ChromAIX: Fast photon-counting ASIC for Spectral Computed TomographyNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2011
- Design considerations to overcome cross talk in a photon counting silicon strip detector for computed tomographyNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2010
- Power consumption of analog circuits: a tutorialAnalog Integrated Circuits and Signal Processing, 2010
- Simulation study of an energy sensitive photon counting silicon strip detector for computed tomography: identifying strengths and weaknesses and developing work-aroundsPublished by SPIE-Intl Soc Optical Eng ,2010
- Imaging performance of the hybrid pixel detectors XPAD3-SPhysics in Medicine & Biology, 2009
- Energy-resolved computed tomography: first experimental resultsPhysics in Medicine & Biology, 2008
- CERN_DxCTA counting mode chipNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2008
- Computed tomography with energy-resolved detection: a feasibility studyPhysics in Medicine & Biology, 2008
- LVDS I/O interface for Gb/s-per-pin operation in 0.35-μm CMOSIEEE Journal of Solid-State Circuits, 2001
- Limits of low noise performance of detector readout front ends in CMOS technologyIEEE Transactions on Circuits and Systems, 1990