Implementation and Evaluation of a Hardware Decentralized Synchronization Lock for MPSoCs
- 1 May 2020
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)
- p. 1112-1121
- https://doi.org/10.1109/ipdps47924.2020.00117
Abstract
Each generation of shared memory Multi-Processor System-on-Chips (MPSoCs) tend to embed more and more computing units. The cores of modern MPSoCs are often grouped into clusters communicating with each other through Networks on Chip (NoCs). Having efficient scalable synchronization mechanisms is then mandatory to benefit from the high parallelism they offer.In this work we propose an innovative hardware support for synchronization locks. First of all, a non-intrusive measurement tool-chain allows us to prove a fundamental hypothesis as to optimization of the lock mechanism: although a lock may be used, at runtime, by various cores belonging to different clusters, it is often reused by the last core which has released it. Based on this observation, we provide a hardware decentralized solution to manage dynamic re-homing of locks in a dedicated memory, close to the latest access-granted core. This reduces overall access latency and network traffic in case of reuse of the lock within the same cluster.This paper presents our solution, called Lockality, and its performance evaluation on a characteristic MPSoC running on a hardware emulator. Experiments show large gains at low level (physical lock acquisition) as well as at the application level.Keywords
This publication has 10 references indexed in Scilit:
- Hardlock: Real-time multicore lockingJournal of Systems Architecture, 2019
- Accurate MPSoC Prototyping Platform and Methodology for the Studying of the Linux Synchronization Barrier Slowdown IssuesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2018
- SubutaiPublished by Association for Computing Machinery (ACM) ,2018
- Efficient Synchronization for Distributed Embedded MultiprocessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
- An efficient asymmetric distributed lock for embedded multiprocessor systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2012
- GLocks: Efficient Support for Highly-Contended Locks in Many-Core CMPsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2011
- Handling shared variable synchronization in multi-core Network-on-Chips with distributed memoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2010
- Efficient Synchronization for Embedded On-Chip MultiprocessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2006
- The SPLASH-2 programs: characterization and methodological considerationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Algorithms for scalable synchronization on shared-memory multiprocessorsACM Transactions on Computer Systems, 1991