A 1 TOPS/W Analog Deep Machine-Learning Engine With Floating-Gate Storage in 0.13 µm CMOS
Open Access
- 9 October 2014
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 50 (1), 270-281
- https://doi.org/10.1109/jssc.2014.2356197
Abstract
An analog implementation of a deep machine-learning system for efficient feature extraction is presented in this work. It features online unsupervised trainability and non-volatile floating-gate analog storage. It utilizes a massively parallel reconfigurable current-mode analog architecture to realize efficient computation, and leverages algorithm-level feedback to provide robustness to circuit imperfections in analog signal processing. A 3-layer, 7-node analog deep machine-learning engine was fabricated in a 0.13 μm standard CMOS process, occupying 0.36 mm 2 active area. At a processing speed of 8300 input vectors per second, it consumes 11.4 μW from the 3 V supply, achieving 1×10 12 operation per second per Watt of peak energy efficiency. Measurement demonstrates real-time cluster analysis, and feature extraction for pattern recognition with 8-fold dimension reduction with an accuracy comparable to the floating-point software simulation baseline.Keywords
This publication has 22 references indexed in Scilit:
- Nano‐power tunable bump circuit using wide‐input‐range pseudo‐differential transconductorElectronics Letters, 2014
- A Batteryless 19 $\mu$W MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG ApplicationsIEEE Journal of Solid-State Circuits, 2013
- Compressive Sensing on a CMOS Separable-Transform Image SensorProceedings of the IEEE, 2010
- An On-Chip-Trainable Gaussian-Kernel Analog Support Vector MachineIEEE Transactions on Circuits and Systems I: Regular Papers, 2009
- A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception EngineIEEE Journal of Solid-State Circuits, 2009
- An Analog Programmable Multidimensional Radial Basis Function Based ClassifierIEEE Transactions on Circuits and Systems I: Regular Papers, 2007
- Sub-Microwatt Analog VLSI Trainable Pattern ClassifierIEEE Journal of Solid-State Circuits, 2007
- Analog soft-pattern-matching classifier using floating-gate mos technologyIEEE Transactions on Neural Networks, 2003
- A micropower learning vector quantizer for parallel analog-to-digital data compressionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Matching properties of MOS transistorsIEEE Journal of Solid-State Circuits, 1989