Nano‐power tunable bump circuit using wide‐input‐range pseudo‐differential transconductor
Open Access
- 1 June 2014
- journal article
- circuits and-systems
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 50 (13), 921-923
- https://doi.org/10.1049/el.2014.0920
Abstract
An ultra-low-power tunable bump circuit is presented. It incorporates a novel wide-input-range tunable pseudo-differential transconductor linearised using the drain resistances of saturated transistors. Measurement results show that the transconductor has a 5 V differential input range with 2 in a 0.13 μm CMOS process.Keywords
This publication has 7 references indexed in Scilit:
- An On-Chip-Trainable Gaussian-Kernel Analog Support Vector MachineIEEE Transactions on Circuits and Systems I: Regular Papers, 2009
- An Analog Programmable Multidimensional Radial Basis Function Based ClassifierIEEE Transactions on Circuits and Systems I: Regular Papers, 2007
- Analog soft-pattern-matching classifier using floating-gate mos technologyIEEE Transactions on Neural Networks, 2003
- Linearised differential transconductors in subthreshold CMOSElectronics Letters, 1995
- A voltage-controllable linear MOS transconductor using bias offset techniqueIEEE Journal of Solid-State Circuits, 1990
- CMOS triode transconductor for continuous-time active integrated filtersElectronics Letters, 1985
- Design of linear CMOS transconductance elementsIEEE Transactions on Circuits and Systems, 1984