OG-FET: An In-Situ ${O}$ xide, ${G}$ aN Interlayer-Based Vertical Trench MOSFET

Abstract
In this letter, a novel device design to achieve both low ON-resistance and enhancement mode operation in a vertical GaN FET is demonstrated. In the traditional trench MOSFET structure, a dielectric is deposited on an n-p-n trenched structure and the channel forms via p-GaN inversion at the dielectric/p-GaN interface. However, this results in a relatively high ON-resistance due to poor electron mobility in the channel. By changing the structure to include a metal-organic chemical vapor deposition (MOCVD)-regrown Un-intentionally Doped (UID)-GaN interlayer followed by an in-situ dielectric (MOCVD Al 2 O 3 ) cap on the n-p-n trenched structure, a pathway (channel) for enhanced electron mobility is created, resulting in reduced ON-resistance. Preliminary results for this device design demonstrated almost 60% reduction in the ON-resistance and similar breakdown voltage compared with a traditional trench MOSFET structure while maintaining normally off operation with a threshold voltage of 2 V.
Funding Information
  • Solid State Lighting and Energy Electronics Centre, University of California at Santa Barbara, Santa Barbara
  • ARPA-E SWITCHES Program, (Dr. Timothy Heidel)

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