Micro-architectural simulation of embedded core heterogeneity with gem5 and McPAT
- 19 January 2015
- conference paper
- conference paper
- Published by Association for Computing Machinery (ACM)
Abstract
No abstract availableThis publication has 13 references indexed in Scilit:
- Micro-architectural simulation of in-order and out-of-order ARM microprocessors with gem5Published by Institute of Electrical and Electronics Engineers (IEEE) ,2014
- Low-latency adaptive mode transitions and hierarchical power management in asymmetric clustered coresACM Transactions on Architecture and Code Optimization, 2013
- The McPAT Framework for Multicore and Manycore ArchitecturesACM Transactions on Architecture and Code Optimization, 2013
- Composite Cores: Pushing Heterogeneity Into a CorePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2012
- The gem5 simulatorACM SIGARCH Computer Architecture News, 2011
- Accelerating critical section execution with asymmetric multi-core architecturesACM SIGARCH Computer Architecture News, 2009
- Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload PerformanceACM SIGARCH Computer Architecture News, 2004
- Power and energy reduction via pipeline balancingACM SIGARCH Computer Architecture News, 2001
- Power and energy reduction via pipeline balancingPublished by Association for Computing Machinery (ACM) ,2001
- The SimpleScalar tool set, version 2.0ACM SIGARCH Computer Architecture News, 1997