Abstract
A new technology based on the anisotropic etching of silicon is presented for the reahzation of complementary devices. Anisotropic etching is performed on (100) oriented slices, where large areas, corresponding to complete devices, are etched down to a depth of a few microns. The etching process is discussed and optimized. This basic structure is applied to two new methods for developing silicongate complementary MOS (C-MOS) transistors. High-voltage, p-channel, MOS transistors compatible with the low-voltage, high-density, C-MOS are also prbsented. The advantages of the technology are discussed.