Optimization of the Hydrazine‐Water Solution for Anisotropic Etching of Silicon in Integrated Circuit Technology

Abstract

Anisotropic etching of silicon with the hydrazine‐water mixture is studied and characterized for its practical use in integrated circuit technology. The solution is applied to {100} wafers where the etch presents a v‐shaped cross section limited at the side‐walls by {111} planes and at the bottom by a {100} plane. The etching process is evaluated in terms of the etch rate of the {100} plane, quality of side‐walls and bottom surface, and corner rounding. It is shown that the results are both concentration and temperature dependent. The optimal temperature for the etching process is found to be 100°C for both simple temperature control and high quality etching. It is also shown that the optimal mixture concentration must be choesn according to the particular use of the anisotropic etching. The optimal volume concentrations of hydrazine for the various applications are: 65% for VMOS devices and for v‐groove isolation rings, 70–80% for two‐level structures with flat bottom surface, and for electrode and sensor fabrication.