Phase-locked loop for grid synchronization under unbalanced operation and harmonic distortion
- 1 November 2011
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society
Abstract
This paper presents a synchronization algorithm aimed to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of an unbalanced and distorted three-phase reference signal. The proposed scheme does not require transformation of variables into the synchronous frame coordinates as conventional phase-locked loop (PLL) schemes. Therefore, it is not based on the phase angle detection. Instead, the angular frequency is detected and used for synchronization purposes. The design of the proposed scheme, referred as UH-PLL, is based on a complete description of a three-phase signal which involves both positive and negative sequences in stationary coordinates of the fundamental and harmonic components. Moreover, it includes an explicit harmonic compensation mechanism to alleviate the effect of harmonic distortion. Therefore, the proposed UH-PLL is intended to perform properly under severe unbalanced conditions, subject to distortion caused by low harmonics, and is robust against angular frequency variations, and sags and swells in the three-phase reference signal.Keywords
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