Fixed-Reference-Frame Phase-Locked Loop for Grid Synchronization Under Unbalanced Operation
- 14 June 2010
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 58 (5), 1943-1951
- https://doi.org/10.1109/tie.2010.2052534
Abstract
This paper presents a grid synchronization scheme aimed to provide an estimation of the angular frequency and both the positive and negative sequences of the fundamental component of an unbalanced three-phase signal. These sequences are provided in fixed-reference-frame coordinates, and thus, the proposed algorithm is referred to as fixed-reference-frame phase-locked loop (PLL) (FRF-PLL). In fact, the FRF-PLL does not require transformation of variables into the synchronous frame coordinates as in most PLL schemes. Therefore, the proposed scheme is not based on the phase angle detection. Instead, the angular frequency is detected and used for synchronization purposes. The design of the FRF-PLL is based on a complete description of the source voltage involving both positive and negative sequences in stationary coordinates and considering the angular frequency as an uncertain parameter. Therefore, the FRF-PLL is intended to perform properly under severe unbalanced conditions and to be robust against angular frequency variations, sags, and swells in the three-phase utility voltage signal. Due to the selective nature of the scheme, it shows certain capability to alleviate the effect of harmonic distortion that is present in the utility voltage signal.Keywords
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