Detection of Site to Site Variations from Volume Measurement Data in Multi-site Semiconductor Testing

Abstract

The rising analog content in mixed-signal Integrated Circuits (ICs) is driving an increased need for measurement of analog parametric specifications during manufacturing test, thereby significantly increasing overall chip cost. Multi-site (parallel) measurement alleviates this issue by measuring multiple chips at the same time, hence massively increasing throughput and reducing measurement time per chip. For successful multi-site test and measurement, product and test engineers have to design multi-site boards that can ensure robust measurement and test quality for each site. However, as the number of sites increases, variations in site to site behavior is often seen, leading to degradation of test results at some sites. These variations result from various artifacts such as non-homogenous layout and routing, compromises in component placement, etc. Very often, methods to detect board and site anomalies are ad hoc, leading to a time-consuming and expensive diagnosis cycle. Therefore, there is a need for a cost-effective approach to investigate and identify site to site variations from measurement data. This work proposes an automated technique that leverages advanced statistical learning methods to pronounce and detect site to site variations not always visible to human inspections of measurement data. Specifically, we contribute the concept of using domain transformation that converts measurement data in the specification value space to a statistical parameter space, allowing for robust automatic detectability of site to site variations. Robustness and accuracy of the method are confirmed after application to real-world industrial and simulated measurement data.