Investigation of ferroelectric field-effect transistors using a replacement metal gate process

Abstract

Negative capacitance field-effect-transistor (NCFET) is an emerging steep switching device, which utilizes the negative capacitance of the ferroelectric layer to induce a voltage amplification in gate stack. In this study, a NCFET was fabricated through using a replacement metal gate process, which can avoid the influence of high temperature process on ferroelectric film. The different sub-threshold swing (SS) characteristics of forward gate voltage sweep and reverse gate voltage sweep were investigated. The results show that the different SS characteristics may originate from asymmetrical polarization-voltage (P-V) hysteresis loops of metal-ferroelectric-insulator-silicon (MFIS) capacitance in NCFET. Moreover, the influence of Hf/Zr ratio, annealing temperature, and capacitance size on ferroelectric characteristics was investigated. The experimental results show that there is an optimal Hf/Zr ratio and annealing temperature that maximizes the residual polarization (Pr). For ferroelectric field-effect-transistor (FeFET) memory design, the largest Pr should be chosen to increase retention time. For ferroelectric NCFET logic design, negative capacitance can be adjusted by changing the Hf/Zr ratio and annealing temperature to achieve better capacitance matching between positive capacitance and negative capacitance. It is expected that experimental results may provide some guidance into the design and performance enhance for FeFET/NCFET.