Sub-60mV-swing negative-capacitance FinFET without hysteresis
Top Cited Papers
- 1 December 2015
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 22.6.1-22.6.4
- https://doi.org/10.1109/iedm.2015.7409760
Abstract
In this work, we report the first Negative-Capacitance FinFET. ALD Hf042Zr058O2 is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO2 ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.Keywords
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