RNS architectures for the implementation of the `diagonal function'
- 31 March 2000
- journal article
- research article
- Published by Elsevier BV in Information Processing Letters
- Vol. 73 (5-6), 189-198
- https://doi.org/10.1016/s0020-0190(00)00003-x
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
- Fast combinatorial RNS processors for DSP applicationsIEEE Transactions on Computers, 1995
- RNS-based enhancements for direct digital frequency synthesisIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1995
- Design of residue generators and multioperand modular adders using carry-save addersIEEE Transactions on Computers, 1994
- A new technique for fast number comparison in the residue number systemIEEE Transactions on Computers, 1993
- A new magnitude function for fast numbers comparison in the residue number systemMicroprocessing and Microprogramming, 1992
- Fast and flexible architectures for RNS arithmetic decodingIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1992
- Design and performance of the IBM Enterprise System/9000 Type 9121 Vector FacilityIBM Journal of Research and Development, 1991
- The application of core functions to residue number systemsIEEE Transactions on Signal Processing, 1991
- Residue Arithmetic A Tutorial with ExamplesComputer, 1984
- Sign Detection and Implicit-Explicit Conversion of Numbers in Residue ArithmeticIEEE Transactions on Computers, 1983