Fundamental Cooling Limits for High Power Density Gallium Nitride Electronics
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- 11 June 2015
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Components, Packaging and Manufacturing Technology
- Vol. 5 (6), 737-744
- https://doi.org/10.1109/tcpmt.2015.2433132
Abstract
The peak power density of GaN high-electron-mobility transistor technology is limited by a hierarchy of thermal resistances from the junction to the ambient. Here, we explore the ultimate or fundamental cooling limits for junction-to fluid cooling, which are enabled by advanced thermal management technologies, including GaN-diamond composites and nanoengineered heat sinks. Through continued attention to near-junction resistances and extreme flux convection heat sinks, heat fluxes beyond 300 kW/cm 2 from individual 2-μm gates and 10 kW/cm2 from the transistor footprint will be feasible. The cooling technologies under discussion here are also applicable to thermal management of 2.5-D and 3-D logic circuits at lower heat fluxes.Keywords
Funding Information
- Air Force Office of Scientific Research (AFOSR) and Defense Advanced Research Projects Agency (DARPA) Microsystems Technology Office through the Near Junction Thermal Transport and Intrachip/Interchip Enhanced Cooling Programs
- DARPA through the Project entitled Phase Separation Diamond Microfluidics for HEMT Cooling monitored by Avi Bar Cohen (HR0011-13-2-0011)
- Direct Sponsorship through Raytheon, BAE Systems, and RFMD
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