Abstract
This paper shows how high-level synthesis bridges the gap between behavioral specifications and hardware structure by automatically generating a circuit description from a netlist. The resulting description can be used for other design automation tools, such as logic synthesis and layout. As opposed to logic synthesis, which optimizes only combinational logic, high-level synthesis deals with memory elements, the interconnection structures, (such as buses and multiplexers), and the sequential aspects of a design. The steps in the process of synthesizing synchronous digital hardware are explained. They consist of compilation, high-level transformations, scheduling, and allocation. Design representation is discussed, and problems remaining to be solved are indicated.

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