A 4 GHz 60 dB Variable Gain Amplifier With Tunable DC Offset Cancellation in 65 nm CMOS
- 23 October 2014
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Microwave and Wireless Components Letters
- Vol. 25 (1), 37-39
- https://doi.org/10.1109/lmwc.2014.2361676
Abstract
This letter presents a compact CMOS based variable gain amplifier with 60 dB gain control range and a feedback reconfigurable dc offset cancellation. The design is a four-stage fully differential cascaded amplifier implemented using a 65 nm CMOS process. The amplifier achieves a current controllable gain range from -39.4 dB to +20.2 dB, a voltage tunable lower cutoff frequency from dc to 200 kHz, a consistent 3 dB bandwidth better than 4 GHz, a maximum dc power consumption of 26 mW, a measured in-band group delay variation of 20 ps, and a noise figure from 10 to 27 dB. The proposed VGA design occupies a compact die area of only 75 μm × 80 μm (excluding pads for measurement).Keywords
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