1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI applications
- 1 January 1997
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 33 (16), 1375-1376
- https://doi.org/10.1049/el:19970915
Abstract
A 1.5 V full-swing energy efficient logic circuit is reported that is suitable for next-generation low-power VLSI applications using a low supply voltage. At 25 MHz and at 1.5 V, the power consumption of the EEL circuit is 70% of that for an ECRL circuit and 47% of that for the static circuit.Keywords
This publication has 3 references indexed in Scilit:
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