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VLSI Placement and Global Routing Using Simulated Annealing
Home
Publications
VLSI Placement and Global Routing Using Simulated Annealing
VLSI Placement and Global Routing Using Simulated Annealing
CS
Carl Sechen
Carl Sechen
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1 January 1988
book
Published by
Springer Science and Business Media LLC
https://doi.org/10.1007/978-1-4613-1697-8
Abstract
No abstract available
Keywords
MODULATION
PHASE
STANDARD
VLSI
CIRCUIT
COMBINATORIAL OPTIMIZATION
COMPUTER
COMPUTER-AIDED DESIGN (CAD)
ELECTRONICS
GATE ARRAY
INTEGRATED CIRCUIT
INTERCONNECT
MICROELECTRONICS
MODEL
PHYSICS
Cited by 130 articles