Damascene stud local interconnect in CMOS technology

Abstract

Localized interconnects are key to reducing the cell size of SRAMs as well as providing improved densities for logic circuits. A planar local interconnect featuring a damascene W stud metallurgy is described. Features of the damascene process include borderless contacts to both wordlines and diffusion, contact to the local interconnect, reduced topography, and low resistivity. The borderless contact feature is accomplished by incorporation of an etch stop. Chemical-mechanical polishing is used to planarize the dielectric passivation and W fills.