Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region

Abstract
The interaction problem between asynchronous logic elements is formulated with emphasis on the synchronizer. A detailed analytic treatment of the binary flip-flop action in the metastable region is presented. The principle result is to predict, in a probabilistic manner, the time necessary to move from the metastable point to one of the stable boundaries. The effects of circuit time constant and circuit noise are discussed in detail. Theoretical results are correlated with laboratory measurements and suggestions for acceptable probability of error performance are given.