Accuracy evaluation of GEM5 simulator system
- 1 July 2012
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Design space exploration (DSE) of complex embedded systems that combine a number of CPUs, dedicated hardware and software is a tedious task for which a broad range of approaches exists, from the use of high-level models to hardware prototyping. Each of these entails different simulation speed/accuracy tradeoffs, and thereby enables exploring a certain subset of the design space in a given time. Some simulation frameworks devoted to CPU-centric systems have been developed over the past decade, that either feature near real-time simulation speed or moderate to high speed with quasi-cycle level accuracy, often by means of instruction-set simulators or binary translation techniques. This paper presents an evaluation in term of accuracy in modeling real systems using the GEM5 simulator that belong to the first class. Performance figures of a wide range of benchmarks (e.g. in domains such as scientific computing and media applications) are captured and compared to results obtained on real hardware.Keywords
This publication has 8 references indexed in Scilit:
- The gem5 simulatorACM SIGARCH Computer Architecture News, 2011
- The ALPbench benchmark suite for complex multimedia applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2006
- The M5 Simulator: Modeling Networked SystemsIEEE Micro, 2006
- Multifacet's general execution-driven multiprocessor simulator (GEMS) toolsetACM SIGARCH Computer Architecture News, 2005
- The Rapid Prototyping of Application Specific Signal Processors (RASSP) program: overview and statusPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- The SPLASH-2 programs: characterization and methodological considerationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- SimpleScalar: an infrastructure for computer system modelingComputer, 2002
- The performance advantages of integrating block data transfer in cache-coherent multiprocessorsPublished by Association for Computing Machinery (ACM) ,1994