20-nm In0.8Ga0.2As MOSHEMT MMIC Technology on Silicon
- 14 June 2019
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 54 (9), 2411-2418
- https://doi.org/10.1109/jssc.2019.2915161
Abstract
High-gain millimeter-wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a planar metamorphic 20-nm gate length InGaAs metal-oxide-semiconductor high-electron-mobility transistor (MOSHEMT) technology on Si. Therefore, an Al₂O₃/HfO₂ layer stack was deposited as a gate dielectric directly on top of an In₀.8Ga₀.2As channel by atomic layer deposition. The III-V heterostructure was epitaxial grown on a GaAs wafer and subsequently direct wafer bonded to a Si substrate, leading to a high-quality III-V channel formation on Si. The gate layout was optimized for millimeter-wave and submillimeter-wave integrated circuit applications using T-gates and wet chemical recess etching to minimize the parasitic gate capacitances. For a 2 x 10 μm gate width transistor, a transit frequency fT of 200 GHz and a record maximum oscillation frequency fmax of 640 GHz were extrapolated. A realized three-stage cascode amplifier circuit demonstrated a maximum gain of 21 dB at 278 GHz and a small-signal gain of more than 17 dB between 222 and 284 GHz. The total chip size of the millimeter-wave amplifier MMIC was only 0.5 x 1.2 mm². To verify the RF performance of the III-V MOSHEMT on Si technology, all devices and circuits have been reproduced using an InGaAs MOSHEMT on GaAs technology, which has been processed simultaneously within the same wafer batch and achieved almost identical results.Keywords
Funding Information
- German Federal Ministry of Defence
- Bundeswehr Technical Center for Information Technology and Electronics (WTD 81) in the framework of the MIKOSENS 3 Program
- European Union’s Horizon 2020 Research and Innovation Programme (688784)
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