Impact of the pattern layout on radio-frequency performance of thin-film SOI power MOSFETs
- 1 January 2004
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 245-248
- https://doi.org/10.1109/wct.2004.239971
Abstract
This paper describes guidelines for designing thin-film SOI power MOSFETs for linear-amplification applications. The linear-amplification characteristics and DC performance depend on the grand interconnection pattern. We prefer to put the grand pattern on the drain (output) side. There are optimum finger lengths which provide the best linear amplification characteristics. Finger length also depends on the operating frequency and total gate width.Keywords
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