Evaluation of architecture-level power estimation for CMOS RISC processors

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1 January 1995

conference paper
conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE) in 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers

https://doi.org/10.1109/lpe.1995.482457

Abstract

No abstract available

This publication has 1 reference indexed in Scilit:

A 150 MIPS/W CMOS RISC processor for PDA applications
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002

Cited by 21 articles