Exploiting spatial locality in data caches using spatial footprints
- 16 April 1998
- journal article
- Published by Association for Computing Machinery (ACM) in ACM SIGARCH Computer Architecture News
- Vol. 26 (3), 357-368
- https://doi.org/10.1145/279361.279404
Abstract
Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on a cache miss. Subsequent references to words within the same cache line result in cache hits. Although this approach benefits from spatial locality, less than half of the data brought into the cache gets used before eviction. The unused portion of the cache line negatively impacts performance by wasting bandwidth and polluting the cache by replacing potentially useful data that would otherwise remain in the cache.This paper describes an alternative approach to exploit spatial locality available in data caches. On a cache miss, our mechanism, called Spatial Footprint Predictor (SFP), predicts which portions of a cache block will get used before getting evicted. The high accuracy of the predictor allows us to exploit spatial locality exhibited in larger blocks of data yielding better miss ratios without significantly impacting the memory access latencies. Our evaluation of this mechanism shows that the miss rate of the cache is improved, on average, by 18% in addition to a significant reduction in the bandwidth requirement.Keywords
This publication has 13 references indexed in Scilit:
- Run-time adaptive cache hierarchy management via reference analysisPublished by Association for Computing Machinery (ACM) ,1997
- Compiler-based prefetching for recursive data structuresPublished by Association for Computing Machinery (ACM) ,1996
- A data cache with multiple caching strategies tuned to different types of localityPublished by Association for Computing Machinery (ACM) ,1995
- Predicting and precluding problems with memory latencyIEEE Micro, 1994
- Cache designs with partial address matchingPublished by Association for Computing Machinery (ACM) ,1994
- An effective on-chip preloading scheme to reduce data access penaltyPublished by Association for Computing Machinery (ACM) ,1991
- Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffersPublished by Association for Computing Machinery (ACM) ,1990
- The performance impact of block sizes and fetch strategiesPublished by Association for Computing Machinery (ACM) ,1990
- Line (Block) Size Choice for CPU Cache MemoriesIEEE Transactions on Computers, 1987
- Cache MemoriesACM Computing Surveys, 1982