Abstract
In order to improve the time synchronization precision in the electronic power system, the transmission of the timing information is demodulated based on FPGA. Based on the time service accuracy, the transmission timing information adopts IRIG-B code, the digital Costas loop is introduced in the process of FPGA demodulating IRIG-B code, which can extract the zero-crossing point information of IRIG-B code to avoid the problems of zero drift and pulse jitter in zero-crossing detection circuit. In this article, the time unifying terminal equipment has adopted the BeiDou satellite navigation receiver as the clock source and the output standard is IRIG-B code. The simulation results show that the algorithm reduces the synchronization errors of IRIG-B code, improves the timing synchronization precision, and fulfills the requirement of timing accuracy in the power system.