Optimization of error detecting codes for the detection of crosstalk originated errors
- 13 November 2002
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 17 references indexed in Scilit:
- Self-dual parity checking-A new method for on-line testingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Testing scheme for IC's clocksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A novel methodology for designing TSC networks based on the parity bit codePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Self-checking detection and diagnosis of transient, delay, and crosstalk faults affecting bus linesIEEE Transactions on Computers, 2000
- Bus crosstalk fault-detection capabilities of error-detecting codes for on-line testingIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1999
- Concurrent checking of clock signal correctnessIEEE Design & Test of Computers, 1998
- On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1997
- RSYN: a system for automated synthesis of reliable multilevel circuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1994
- Self-checking combinational circuit design for single and unidirectional multibit errorJournal of Electronic Testing, 1994
- Shorts in self-checking circuitsJournal of Electronic Testing, 1991